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Dependability Evaluation of COTS Microprocessors via On-Chip debugging facilities

This paper presents a fault injection tool and methodology for performing Single-Event-Upsets (SEUs) injection campaigns on Commercial-off-the-shelf (COTS) microprocessors. This method takes advantage of the debug facilities of modern microprocessors along with standard GNU Debugger (GDB) for execut...

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Main Author: Isaza-González, José (author)
Other Authors: Serrano-Cases, Alejandro (author), Restrepo-Calle, Felipe (author), Cuenca-Asensi, Sergio (author), Martínez-Álvarez, Antonio (author)
Format: article
Language:Spanish
Published: 2017
Subjects:
Commercial-off-the-shelf (COTS); on-chip debug; radiation effects; microprocessors reliability; fault injection; soft-error
Commercial-off-the-shelf (COTS); depuración integrada en el chip; efectos de la radiación; fiabilidad de microprocesadores; inyección de fallos; errores lógicos
Online Access:http://revistas.utp.ac.pa/index.php/id-tecnologico/article/view/1432
http://ridda2.utp.ac.pa/handle/123456789/1781
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Summary:This paper presents a fault injection tool and methodology for performing Single-Event-Upsets (SEUs) injection campaigns on Commercial-off-the-shelf (COTS) microprocessors. This method takes advantage of the debug facilities of modern microprocessors along with standard GNU Debugger (GDB) for executing and debugging benchmarks. The developed experiments on real boards, as well as on virtual machines, demonstrate the feasibility and flexibility of the proposal as a low-cost solution for assessing the reliability of COTS microprocessors

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